1. Field of the Invention
The present invention relates to a microcomputer logic development system and method. More particularly, the present invention relates to a system and method for developing logic to be implemented in a built-in microcomputer that is incorporated in an electronic control unit.
2. Description of the Related Art
The control of electronically controlled equipment, for example, the control of an engine by an electronic control unit (ECU) must be modified yearly in order to comply with regulations including emission regulations or to improve the performance of the ECU along with improvements in the performance of a microcomputer. At present, new logic is developed prior to the improvement in the performance of the existing ECU. The preceding logic often targets the new generation of microcomputers expected to enjoy improved performance. Moreover, a new-generation microcomputer enjoying improved performance is selected based on the performance required to implement the preceding logic.
However, an ECU having a new-generation microcomputer, which enjoys improved performance, incorporated therein is unavailable. The preceding logic is often developed using the logic implemented in an existing microcomputer as a base.
However, when an ECU having an existing microcomputer incorporated therein is used to develop the preceding logic, problems described below arise.                (1) The throughput of a CPU included in the microcomputer is insufficient.        (2) The storage capacity of a memory included in the microcomputer is insufficient.        (3) The number of peripheral resources is too small.        (4) It takes much time to develop and manufacture a new-generation ECU.        
Due to the above problems, development of a new-generation microcomputer is delayed. This hinders development of new electrically controlled equipment to be controlled by an ECU in which the new-generation microcomputer is incorporated.
A built-in microcomputer that is incorporated in an existing electronic control unit has the performance of a CPU and the capability of the peripheral equipment selected based on the specifications optimal for an existing system in order to minimize the cost of the electronic control unit. Moreover, as the CPU and microcomputer peripheral resources are encased in one package, unless the microcomputer is modified, the capabilities of the CPU and peripheral resources cannot be modified independently of one another. Moreover, for development of logic to be implemented in the built-in microcomputer, a CPU whose throughput is large enough to implement the preceding logic must be procured, and the same assortment of microcomputer peripheral resources as the one to be included in a preceding system must be procured. Moreover, every time a new microcomputer is developed, an ECU must be manufactured in line with the microcomputer.
In order to solve the problems, an attempt has been made to realize the features of a built-in microcomputer with a one-chip microcomputer verification board (refer to, for example, FIG. 1 and FIG. 2 included in Japanese Unexamined Patent Application Publication No. 8-16425). The one-chip microcomputer verification board is formed with a printed-circuit board on which a general-purpose CPU, memories (RAM and ROM), programmable logic circuits (FPGAs), and programmable wiring elements (FPIC) for interconnecting the CPU, memories, and programmable logic circuits are mounted so that they can be replaced with new ones.
As far as the one-chip microcomputer verification board is concerned, logical features corresponding to a user circuit, input and output units, and a register unit which are adaptable to a system in which a one-chip microcomputer is employed are programmed in field-programmable gate arrays (FPGAs). An FPIC is used to determine the interconnections among the input/output terminals of the CPU, memories, and FPGAs. Moreover, in order to develop a different one-chip microcomputer verification board, a ROM, FPGAs, and an FPIC, suitable for a system to which the verification board is adapted, are newly produced and an old ROM, FPGAs, and an FPIC are replaced with the new ones.
In contrast, the present inventor et al. have already proposed a microcomputer logic development system, which enables development of preceding logic when a built-in microcomputer to be incorporated in an existing electronic control unit is replaced with an external high-performance microcomputer, for the purpose of developing general-purpose preceding logic (Japanese Unexamined Patent Application Publication No. 2003-167756).
In the microcomputer logic development system, an ECU generally comprises a motherboard having the capability of a CPU included in a microcomputer, a core board having the capabilities of input/output resources included in the microcomputer, and an interface board that accommodates hardware facilities. The motherboard and the core board are connected to each other over a peripheral component interconnect bus (a PCI bus) and communicate input/output information to each other. The performance of each board itself is determined by the performance of each of components mounted on the board.
However, whether the performance of each board can be effectively drawn out as the performance of the microcomputer logic development system itself is known to depend largely on a communication speed at which input/output information is transferred between the motherboard and core board, or the throughputs attained on the motherboard and core board. For example, when electrically controlled equipment is a high-performance engine control system, the problems described below arise.                (1) Abnormal input/output data greatly affects the engine control system.        (2) The number of passes that must be executed for initiating input/output operations at strict timing increases, and the processing time increases.        (3) The number of arithmetic/logic operations that deal with a large amount of data increases.        